AI Is a Power Problem: Semiconductor Leadership Summit | Delegate Perspective

AI Is a Power Problem

Semiconductor Leadership Summit | Delegate Perspective
By a Senior Commercial Analyst at Rebound Electronics

At the Semiconductor Leadership Summit, much of the conversation revolved around artificial intelligence. But beneath the discussion on models, compute, and GPUs sits a more practical constraint: power and efficiency.

Three sessions stood out in particular – covering Silicon Carbide power devices, engineered substrates, and Wide Bandgap testing challenges. Together they highlight something the industry is increasingly recognising:

AI growth is not just a compute race. It is an energy and infrastructure race.

1. Silicon Carbide Is Moving into the AI Infrastructure Conversation

In the session “Application Driven SiC Power Products for Fast Growing Markets,” Dr. Ty McNutt of Wolfspeed discussed how Silicon Carbide (SiC) is increasingly relevant beyond automotive and industrial applications.

AI data centres are becoming extremely power-dense environments. Traditional silicon power devices are beginning to show their limitations when it comes to efficiency and thermal management.

SiC offers clear advantages:

• Higher power density
• Lower switching losses
• Better thermal tolerance
• Higher efficiency at scale

For hyperscale data centres, these improvements translate directly into lower cooling requirements and reduced operating costs. When thousands of racks are involved, even marginal efficiency gains become commercially significant.

2. Advanced Materials Are Quietly Enabling AI Chips

Another key session, “From Cloud to Edge: How Engineered Substrates are Optimising the Power-Efficient AI Revolution,” was presented by Goh Seng Lip from Soitec.

The takeaway was straightforward: AI chip performance increasingly depends on the materials beneath them.

Engineered substrates such as Silicon-on-Insulator (SOI) improve transistor efficiency by reducing parasitic losses and power leakage. That matters for both hyperscale compute and edge devices where energy efficiency and thermal limits define system performance.

As AI workloads expand across cloud infrastructure, autonomous systems, and edge computing, material innovation is becoming just as important as processor design.

Put simply: better chips increasingly start with better wafers.

3. Wide Bandgap Devices Are Creating New Testing Challenges

The third session, “High Energy Test Challenges and Opportunities in Wide Bandgap Power Devices,” delivered by Henry Chu of Advantest, addressed a topic that often gets less attention: testing.

Wide Bandgap technologies such as SiC and GaN operate at higher voltages, faster switching speeds, and greater thermal stress than traditional silicon devices.

That creates new challenges for semiconductor testing:

• High-energy validation environments
• Accurate high-voltage measurement
• Thermal reliability testing
• Advanced automated test equipment

Without testing infrastructure that can replicate these conditions reliably, scaling WBG technologies becomes difficult.

In other words, innovation in power semiconductors also requires innovation in how we test them.

What This Means for the Semiconductor Industry

Taken together, these discussions point to a broader shift in the semiconductor landscape.

The AI boom is expanding demand beyond processors and into the supporting layers of the ecosystem:

• Power semiconductors
• Advanced materials
• Packaging technologies
• Testing infrastructure

For companies across the semiconductor value chain – including distributors, manufacturers, and system designers – this creates both opportunities and pressure to adapt.

The real constraint on AI growth may not ultimately be compute.

It may be how efficiently we power, build, and validate the hardware behind it.